This invention relates to a current controlled ring oscillator and its use in phase locked loop (PLL) systems.
Phase locked loop techniques have been known since the early 1930's but had been somewhat avoided because of their high cost and complexity in discrete system design. With the developments in integrated circuit design and processing this situation is rapidly changing and phase locked loops are fast becoming versatile building blocks with many applications.
Basically a phase locked loop is a frequency feedback system comprised of a phase detector, a low-pass filter and a voltage-controlled oscillator (VCO) in the feedback path. When the input signal to the loop is zero the voltage-controlled oscillator operates at a predetermined, free-running frequency. If an input signal is applied, usually by a crystal controlled oscillator, the phase detector compares the phase and frequency of the input signal with the signal of the voltage controlled oscillator and generates an error voltage that is related to the difference in the two signals. The error voltage is then filtered and applied to the control of the VCO thereby varying the VCO frequency in a direction that reduces the frequency difference between the two signals. When the frequencies of the two signals become sufficiently close, the feedback nature of the system causes the system to lock with the incoming signal. Once in lock the VCO frequency is identical with the input signal, except for a finite phase difference which is necessary to generate the corrective error voltage to shift the VCO frequency to the input signal frequency, thus keeping the system in lock.
Used as a building block the phase locked loop is suitable for a wide variety of applications including FM demodulation, frequency synchronization and signal conditioning.
Normally, a PLL has a voltage controlled oscillator which runs off of the low pass filter output. However, to integrate a voltage controlled oscillator using conventional voltage controlled oscillator design requires considerable silicon area on the chip due to the complexity of the circuitry. A further problem found by using voltage controlled oscillators in a PLL is in getting the PLL to lock on the input signal, that is generating the proper error voltage to regulate the voltage controlled oscillator signal output.